samp/counter/counter_xunit_design.rb in ruby-vpi-12.1.0 vs samp/counter/counter_xunit_design.rb in ruby-vpi-13.0.0

@@ -1,9 +1,9 @@
 # This is a Ruby interface to the design under test.
 
 # This method resets the design under test.
 def Counter.reset!
-  # assert the reset signal for five clock cycles
+  # assert the reset signal for two clock cycles
   reset.intVal = 1
-  5.times {relay_verilog}
+  2.times {relay_verilog}
   reset.intVal = 0
 end