lib/ruby-vpi.rb in ruby-vpi-14.0.0 vs lib/ruby-vpi.rb in ruby-vpi-15.0.0

@@ -94,10 +94,14 @@
     # set up the VPI utility layer
       Object.class_eval do
         include Vpi
       end
 
+      Vpi.module_eval do
+        define_method :simulate, &aSimulationCycle
+      end
+
     # load the design under test
       unless design = vpi_handle_by_name("#{testName}_bench", nil)
         raise "Verilog bench for test #{testName.inspect} is inaccessible."
       end
 
@@ -107,25 +111,21 @@
     # load the design's prototype
       if usePrototype
         require "#{testName}_proto.rb"
 
         Vpi.module_eval do
-          define_method :simulate do
-            design.simulate!
+          define_method :advance_time do |*args|
+            Integer(args.first || 1).times { design.simulate! }
           end
 
           define_method :vpi_register_cb do
-            warn "vpi_register_cb: callbacks not allowed when prototyping"
+            warn "vpi_register_cb: callbacks are ignored when prototype is enabled"
           end
         end
 
         Vpi::vpi_printf "#{Config::PROJECT_NAME}: prototype is enabled for test #{testName.inspect}\n"
 
       else
-        Vpi.module_eval do
-          define_method :simulate, &aSimulationCycle
-        end
-
         # XXX: this completes the handshake, by calling relay_verilog, with pthread_mutex_lock() in relay_main() in the C extension
         advance_time
       end
 
     # load the design's specification