doc/manual.html in ruby-vpi-18.0.1 vs doc/manual.html in ruby-vpi-18.0.2
- old
+ new
@@ -3,11 +3,11 @@
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8"/>
<link rel="stylesheet" type="text/css" href="common.css" media="screen" />
<link rel="stylesheet" type="text/css" href="print.css" media="print" />
<link rel="alternate" type="application/rss+xml" href="http://ruby-vpi.rubyforge.org/doc/rss.xml" title="RSS feed for this project." />
- <title>Ruby-VPI 18.0.1 user manual</title>
+ <title>Ruby-VPI 18.0.2 user manual</title>
</head>
<body>
<div id="site-links">
<a href="readme.html">Home</a>
· <a href="manual.html">Manual</a>
@@ -21,17 +21,17 @@
</div>
<div id="body">
<hr style="display: none"/>
- <div id="Ruby-VPI_18.0.1_user_manual" class="front_cover">
- <h1 class="title"><big>Ruby-VPI 18.0.1 user manual</big></h1>
+ <div id="Ruby-VPI_18.0.2_user_manual" class="front_cover">
+ <h1 class="title"><big>Ruby-VPI 18.0.2 user manual</big></h1>
<h2 class="author">Suraj N. Kurapati</h2>
- <h3 class="date">02 August 2007</h3>
+ <h3 class="date">03 August 2007</h3>
<p>
<div id="About_this_manual" class="paragraph">
<p class="title">About this manual</p>
@@ -62,11 +62,11 @@
<hr style="display: none"/>
<div id="intro" class="chapter">
<h1 class="title">
- Chapter <a href="#a-606978988">2</a>
+ Chapter <a href="#a-607321098">2</a>
<br/><br/>
<big>Welcome</big>
</h1>
@@ -88,23 +88,23 @@
<p>
<hr style="display: none"/>
<div id="resources" class="section">
<h2 class="title">
- <a href="#a-606913148">2.1</a>
+ <a href="#a-607255258">2.1</a>
Resources
</h2>
<div id="Records" class="paragraph">
<p class="title">Records</p>
<ul>
- <li><a href="history.html#a18.0.1">What’s new</a>
- – release notes for version 18.0.1.
+ <li><a href="history.html#a18.0.2">What’s new</a>
+ – release notes for version 18.0.2.
<ul>
<li><a href="history.html">History</a>
– a record of all release notes.</li>
<li><a type="application/rss+xml" href="http://ruby-vpi.rubyforge.org/doc/rss.xml"><img src="images/feed-icon-28x28.png" alt="RSS feed for release announcements" style="float: right"/></a> <a href="http://ruby-vpi.rubyforge.org/doc/rss.xml">RSS feed</a>
– keep track of new releases at your leisure.</li>
@@ -168,11 +168,11 @@
<p>
<hr style="display: none"/>
<div id="intro.features" class="section">
<h2 class="title">
- <a href="#a-606925458">2.2</a>
+ <a href="#a-607267568">2.2</a>
Features
</h2>
@@ -239,11 +239,11 @@
<p>
<hr style="display: none"/>
<div id="intro.reqs" class="section">
<h2 class="title">
- <a href="#a-606937688">2.3</a>
+ <a href="#a-607279798">2.3</a>
Requirements
</h2>
@@ -337,11 +337,11 @@
<p>
<hr style="display: none"/>
<div id="intro.applications" class="section">
<h2 class="title">
- <a href="#a-606940248">2.4</a>
+ <a href="#a-607282358">2.4</a>
Applications
</h2>
@@ -383,11 +383,11 @@
<p>
<hr style="display: none"/>
<div id="intro.appetizers" class="section">
<h2 class="title">
- <a href="#a-606942848">2.5</a>
+ <a href="#a-607284958">2.5</a>
Appetizers
</h2>
@@ -451,11 +451,11 @@
<p>
<hr style="display: none"/>
<div id="intro.license" class="section">
<h2 class="title">
- <a href="#a-606945718">2.6</a>
+ <a href="#a-607287828">2.6</a>
License
</h2>
@@ -497,11 +497,11 @@
<p>
<hr style="display: none"/>
<div id="intro.related-works" class="section">
<h2 class="title">
- <a href="#a-606951108">2.7</a>
+ <a href="#a-607293218">2.7</a>
Related works
</h2>
@@ -518,11 +518,11 @@
<p>
<hr style="display: none"/>
<div id="intro.related-works.pli" class="section">
<h3 class="title">
- <a href="#a-606948168">2.7.1</a>
+ <a href="#a-607290278">2.7.1</a>
Ye olde PLI
</h3>
@@ -545,11 +545,11 @@
<hr style="display: none"/>
<div id="setup" class="chapter">
<h1 class="title">
- Chapter <a href="#a-607019648">3</a>
+ Chapter <a href="#a-607361758">3</a>
<br/><br/>
<big>Setup</big>
</h1>
@@ -557,11 +557,11 @@
<hr style="display: none"/>
<div id="setup.manifest" class="section">
<h2 class="title">
- <a href="#a-606982178">3.1</a>
+ <a href="#a-607324288">3.1</a>
Manifest
</h2>
@@ -583,11 +583,11 @@
<hr style="display: none"/>
<div id="setup.reqs" class="section">
<h2 class="title">
- <a href="#a-606987618">3.2</a>
+ <a href="#a-607329728">3.2</a>
Requirements
</h2>
@@ -600,11 +600,11 @@
<div class="admonition">
<div class="tip" id="Add_support_for_your_Verilog_simulator">
<img src="images/tango/tip.png" alt="tip" class="icon"/>
- <p class="title"><a href="#a-606984648">Tip 1</a>. Add support for your Verilog simulator</p>
+ <p class="title"><a href="#a-607326758">Tip 1</a>. Add support for your Verilog simulator</p>
Write a <a href="http://rubyforge.org/tracker/?group_id=1339">support request</a> for your simulator, while providing a sample transcript of the commands you use to run a test with your simulator, and I will add support for your simulator in the next release!
</div>
</div>
</p>
@@ -614,11 +614,11 @@
<hr style="display: none"/>
<div id="setup.recom" class="section">
<h2 class="title">
- <a href="#a-606993788">3.3</a>
+ <a href="#a-607335898">3.3</a>
Recommendations
</h2>
@@ -629,11 +629,11 @@
<p>
<hr style="display: none"/>
<div id="setup.recom.merger" class="section">
<h3 class="title">
- <a href="#a-606990448">3.3.1</a>
+ <a href="#a-607332558">3.3.1</a>
Text merging tool
</h3>
@@ -673,11 +673,11 @@
<hr style="display: none"/>
<div id="setup.inst" class="section">
<h2 class="title">
- <a href="#a-607002928">3.4</a>
+ <a href="#a-607345038">3.4</a>
Installation
</h2>
@@ -699,22 +699,22 @@
<div class="admonition">
<div class="tip" id="Tuning_for_maximum_performance">
<img src="images/tango/tip.png" alt="tip" class="icon"/>
- <p class="title"><a href="#a-606996338">Tip 2</a>. Tuning for maximum performance</p>
+ <p class="title"><a href="#a-607338448">Tip 2</a>. Tuning for maximum performance</p>
You can tune your installation of Ruby-VPI for maximum performance by adding your C compiler’s optimization flag to the <code class="code"><span style="color:#036; font-weight:bold">CFLAGS</span></code> environment variable <em>before</em> you run the <pre>gem install -y ruby-vpi</pre> command. For example, if your C compiler is GCC, then you can set <code class="code"><span style="color:#036; font-weight:bold">CFLAGS</span></code> to <tt>-O9</tt> for maximum optimization.
</div>
</div>
<hr style="display: none"/>
<div id="setup.inst.windows" class="section">
<h3 class="title">
- <a href="#a-606998868">3.4.1</a>
+ <a href="#a-607340978">3.4.1</a>
Installing on Windows
</h3>
@@ -761,11 +761,11 @@
<hr style="display: none"/>
<div id="setup.maintenance" class="section">
<h2 class="title">
- <a href="#a-607005208">3.5</a>
+ <a href="#a-607347318">3.5</a>
Maintenance
</h2>
@@ -785,11 +785,11 @@
<hr style="display: none"/>
<div id="organization" class="chapter">
<h1 class="title">
- Chapter <a href="#a-607025428">4</a>
+ Chapter <a href="#a-607368998">4</a>
<br/><br/>
<big>Organization</big>
</h1>
@@ -805,11 +805,11 @@
<div class="formal">
<div class="figure" id="fig:organization.detail">
- <p class="title"><a href="#a-607022248">Figure 1</a>. Where does Ruby-VPI fit in?</p>
+ <p class="title"><a href="#a-607364358">Figure 1</a>. Where does Ruby-VPI fit in?</p>
<img src="figures/organization_detailed.png" alt="" />
</div>
</div>
@@ -819,11 +819,11 @@
<p>
<hr style="display: none"/>
<div id="overview.relay" class="section">
<h2 class="title">
- <a href="#a-607028538">4.1</a>
+ <a href="#a-607370648">4.1</a>
Ruby/Verilog interaction
</h2>
@@ -842,11 +842,11 @@
<div class="formal">
<div class="figure" id="fig:ruby_relay">
- <p class="title"><a href="#a-607025058">Figure 2</a>. Interaction between Ruby and Verilog</p>
+ <p class="title"><a href="#a-607367168">Figure 2</a>. Interaction between Ruby and Verilog</p>
<img src="figures/ruby_relay.png" alt="" />
<ol>
@@ -868,11 +868,11 @@
<hr style="display: none"/>
<div id="organization.tests" class="section">
<h2 class="title">
- <a href="#a-607034108">4.2</a>
+ <a href="#a-607376218">4.2</a>
Tests
</h2>
@@ -885,11 +885,11 @@
<div class="formal">
<div class="figure" id="fig:organization">
- <p class="title"><a href="#a-607031008">Figure 3</a>. Organization of a test in Ruby-VPI</p>
+ <p class="title"><a href="#a-607373118">Figure 3</a>. Organization of a test in Ruby-VPI</p>
<img src="figures/organization.png" alt="" />
</div>
</div>
@@ -908,11 +908,11 @@
<p>
<hr style="display: none"/>
<div id="VPI_in_Ruby" class="section">
<h2 class="title">
- <a href="#a-606948098">4.3</a>
+ <a href="#a-607291858">4.3</a>
VPI in Ruby
</h2>
@@ -920,11 +920,11 @@
<hr style="display: none"/>
<div id="Deviations_from_the_VPI_standard" class="section">
<h3 class="title">
- <a href="#a-607043028">4.3.1</a>
+ <a href="#a-607385138">4.3.1</a>
Deviations from the VPI standard
</h3>
@@ -935,11 +935,11 @@
<p>
<hr style="display: none"/>
<div id="Names_are_capitalized" class="section">
<h4 class="title">
- <a href="#a-607036598">4.3.1.1</a>
+ <a href="#a-607378708">4.3.1.1</a>
Names are capitalized
</h4>
@@ -956,11 +956,11 @@
<p>
<hr style="display: none"/>
<div id="a_vprintf__is__printf_" class="section">
<h4 class="title">
- <a href="#a-607039098">4.3.1.2</a>
+ <a href="#a-607381208">4.3.1.2</a>
<code class="code">vprintf</code> is <code class="code">printf</code>
</h4>
@@ -993,11 +993,11 @@
<hr style="display: none"/>
<div id="vpi.handles" class="section">
<h3 class="title">
- <a href="#a-607068568">4.3.2</a>
+ <a href="#a-607236168">4.3.2</a>
Handles
</h3>
@@ -1022,11 +1022,11 @@
<p>
<hr style="display: none"/>
<div id="Accessing_a_handle_s_relatives" class="section">
<h4 class="title">
- <a href="#a-607048248">4.3.2.2</a>
+ <a href="#a-607390358">4.3.2.2</a>
Accessing a handle’s relatives
</h4>
@@ -1059,11 +1059,11 @@
<p>
<hr style="display: none"/>
<div id="Accessing_a_handle_s_properties" class="section">
<h4 class="title">
- <a href="#a-607051188">4.3.2.3</a>
+ <a href="#a-607393298">4.3.2.3</a>
Accessing a handle’s properties
</h4>
@@ -1102,11 +1102,11 @@
<div class="formal">
<div class="figure" id="fig:method_naming_format">
- <p class="title"><a href="#a-607053988">Figure 4</a>. Method naming format for accessing a handle’s properties</p>
+ <p class="title"><a href="#a-607396098">Figure 4</a>. Method naming format for accessing a handle’s properties</p>
<table>
<tr>
<th>Operation </th>
<th>_ </th>
@@ -1155,11 +1155,11 @@
<div class="formal">
<div class="table" id="tbl:accessors">
- <p class="title"><a href="#a-607056418">Table 1</a>. Possible accessors and their implications</p>
+ <p class="title"><a href="#a-607398528">Table 1</a>. Possible accessors and their implications</p>
<table>
<tr>
<th>Accessor </th>
<th>Kind of value accessed </th>
@@ -1209,11 +1209,11 @@
<div class="formal">
<div class="table" id="ex:properties">
- <p class="title"><a href="#a-607059358">Table 2</a>. Examples of accessing a handle’s properties</p>
+ <p class="title"><a href="#a-607223948">Table 2</a>. Examples of accessing a handle’s properties</p>
<table>
<tr>
<th rowspan="2">Ruby expression </th>
<th colspan="6">Method naming format </th>
@@ -1534,11 +1534,11 @@
<hr style="display: none"/>
<div id="vpi.callbacks" class="section">
<h3 class="title">
- <a href="#a-607076998">4.3.3</a>
+ <a href="#a-607249768">4.3.3</a>
Callbacks
</h3>
@@ -1554,11 +1554,11 @@
<div class="formal">
<div class="example" id="ex:callback">
- <p class="title"><a href="#a-607072518">Example 1</a>. Using a callback for value change notification</p>
+ <p class="title"><a href="#a-607242918">Example 1</a>. Using a callback for value change notification</p>
<p>This example shows how to use a callback for notification of changes in a handle’s <code class="code"><span style="color:#036; font-weight:bold">VpiIntVal</span></code> property. When you no longer need this callback, you can tear it down using <code class="code">vpi_remove_cb(cb_handle)</code>.</p>
<p>In this example, the handle being monitored is the <code class="code"><span style="color:#036; font-weight:bold">Counter</span>.count</code> signal from <a href="#fig:counter.v_decl">Example 3</a>.</p>
@@ -1603,11 +1603,11 @@
<hr style="display: none"/>
<div id="usage" class="chapter">
<h1 class="title">
- Chapter <a href="#a-607149688">5</a>
+ Chapter <a href="#a-607488938">5</a>
<br/><br/>
<big>Usage</big>
</h1>
@@ -1615,11 +1615,11 @@
<hr style="display: none"/>
<div id="usage.prototyping" class="section">
<h2 class="title">
- <a href="#a-607049328">5.1</a>
+ <a href="#a-607395418">5.1</a>
Prototyping
</h2>
@@ -1657,11 +1657,11 @@
<hr style="display: none"/>
<div id="How_does_prototyping_work_" class="section">
<h3 class="title">
- <a href="#a-607039268">5.1.2</a>
+ <a href="#a-607383008">5.1.2</a>
How does prototyping work?
</h3>
@@ -1679,11 +1679,11 @@
<hr style="display: none"/>
<div id="usage.debugger" class="section">
<h2 class="title">
- <a href="#a-607058778">5.2</a>
+ <a href="#a-607403488">5.2</a>
Debugging
</h2>
@@ -1700,11 +1700,11 @@
<p>
<hr style="display: none"/>
<div id="usage.debugger.init" class="section">
<h3 class="title">
- <a href="#a-607053478">5.2.1</a>
+ <a href="#a-607400418">5.2.1</a>
Advanced initialization
</h3>
@@ -1725,11 +1725,11 @@
<hr style="display: none"/>
<div id="usage.test-runner" class="section">
<h2 class="title">
- <a href="#a-607082308">5.3</a>
+ <a href="#a-607420258">5.3</a>
Test runner
</h2>
@@ -1755,11 +1755,11 @@
<p>
<hr style="display: none"/>
<div id="usage.test-runner.env-vars" class="section">
<h3 class="title">
- <a href="#a-607072228">5.3.1</a>
+ <a href="#a-607413148">5.3.1</a>
Environment variables
</h3>
@@ -1802,11 +1802,11 @@
<div class="formal">
<div class="example" id="Running_a_test_with_environment_variables">
- <p class="title"><a href="#a-607065588">Example 2</a>. Running a test with environment variables</p>
+ <p class="title"><a href="#a-607408978">Example 2</a>. Running a test with environment variables</p>
<p>Below, we enable the prototype and code coverage analysis:
<pre>rake -f your_test_runner.rake PROTOTYPE=1 COVERAGE=1</pre></p>
@@ -1826,11 +1826,11 @@
<hr style="display: none"/>
<div id="usage.tools" class="section">
<h2 class="title">
- <a href="#a-607101458">5.4</a>
+ <a href="#a-607439408">5.4</a>
Tools
</h2>
@@ -1862,11 +1862,11 @@
<p>
<hr style="display: none"/>
<div id="usage.tools.generate" class="section">
<h3 class="title">
- <a href="#a-607091638">5.4.1</a>
+ <a href="#a-607429588">5.4.1</a>
Automated test generation
</h3>
@@ -1892,11 +1892,11 @@
<div class="admonition">
<div class="caution" id="Do_not_rename_generated_files">
<img src="images/tango/caution.png" alt="caution" class="icon"/>
- <p class="title"><a href="#a-607085068">Caution 1</a>. Do not rename generated files</p>
+ <p class="title"><a href="#a-607423018">Caution 1</a>. Do not rename generated files</p>
Ruby-VPI uses the convention described above to dynamically create a direct Ruby interface to the design under test, so <em>do not</em> rename the generated files arbitrarily.
</div>
</div>
@@ -1911,11 +1911,11 @@
<div class="admonition">
<div class="tip" id="Using__kdiff3__with_the_automated_test_generator.">
<img src="images/tango/tip.png" alt="tip" class="icon"/>
- <p class="title"><a href="#a-607087558">Tip 3</a>. Using <strong>kdiff3</strong> with the automated test generator.</p>
+ <p class="title"><a href="#a-607425508">Tip 3</a>. Using <strong>kdiff3</strong> with the automated test generator.</p>
<ol>
<li>Create a file named <tt>merge2</tt> with the following content: <pre class="code">
<span style="color:#888">#!/bin/sh</span>
<span style="color:#888"># args: old file, new file</span>
@@ -1937,11 +1937,11 @@
<hr style="display: none"/>
<div id="usage.tools.convert" class="section">
<h3 class="title">
- <a href="#a-607093928">5.4.2</a>
+ <a href="#a-607431878">5.4.2</a>
Verilog to Ruby conversion
</h3>
@@ -1959,11 +1959,11 @@
<hr style="display: none"/>
<div id="usage.examples" class="section">
<h2 class="title">
- <a href="#a-607103698">5.5</a>
+ <a href="#a-607441648">5.5</a>
Sample tests
</h2>
@@ -1975,11 +1975,11 @@
<hr style="display: none"/>
<div id="usage.tutorial" class="section">
<h2 class="title">
- <a href="#a-606970248">5.6</a>
+ <a href="#a-607314468">5.6</a>
Tutorial
</h2>
@@ -1998,11 +1998,11 @@
<p>
<hr style="display: none"/>
<div id="usage.tutorial.declare-design" class="section">
<h3 class="title">
- <a href="#a-607111108">5.6.1</a>
+ <a href="#a-607449058">5.6.1</a>
Start with a Verilog design
</h3>
@@ -2023,11 +2023,11 @@
<div class="formal">
<div class="example" id="fig:counter.v_decl">
- <p class="title"><a href="#a-607107598">Example 3</a>. Declaration of a simple up-counter with synchronous reset</p>
+ <p class="title"><a href="#a-607445548">Example 3</a>. Declaration of a simple up-counter with synchronous reset</p>
<pre class="code" lang="verilog">
module counter #(parameter Size = 5) (
input clock,
input reset,
@@ -2047,11 +2047,11 @@
<p>
<hr style="display: none"/>
<div id="usage.tutorial.generate-test" class="section">
<h3 class="title">
- <a href="#a-607121708">5.6.2</a>
+ <a href="#a-607459658">5.6.2</a>
Generate a test
</h3>
@@ -2083,11 +2083,11 @@
<div class="formal">
<div class="example" id="fig:generate-test.RSpec">
- <p class="title"><a href="#a-607114448">Example 4</a>. Generating a test with specification in RSpec format</p>
+ <p class="title"><a href="#a-607452398">Example 4</a>. Generating a test with specification in RSpec format</p>
<pre>
$ ruby-vpi generate counter.v --RSpec
module counter
@@ -2105,11 +2105,11 @@
<div class="formal">
<div class="example" id="fig:generate-test.xUnit">
- <p class="title"><a href="#a-607116908">Example 5</a>. Generating a test with specification in xUnit format</p>
+ <p class="title"><a href="#a-607454858">Example 5</a>. Generating a test with specification in xUnit format</p>
<pre>
$ ruby-vpi generate counter.v --xUnit
module counter
@@ -2130,11 +2130,11 @@
<p>
<hr style="display: none"/>
<div id="usage.tutorial.specification" class="section">
<h3 class="title">
- <a href="#a-607131808">5.6.3</a>
+ <a href="#a-607469758">5.6.3</a>
Specify your expectations
</h3>
@@ -2158,11 +2158,11 @@
<div class="formal">
<div class="example" id="fig:RSpec_counter_spec.rb">
- <p class="title"><a href="#a-607124618">Example 6</a>. Specification implemented in RSpec format</p>
+ <p class="title"><a href="#a-607462568">Example 6</a>. Specification implemented in RSpec format</p>
<pre class="code">require <span style="background-color:#fff0f0"><span style="color:#710">'</span><span style="color:#D20">spec</span><span style="color:#710">'</span></span>
<span style="color:#888"># lowest upper bound of counter's value</span>
<span style="color:#036; font-weight:bold">LIMIT</span> = <span style="color:#00D; font-weight:bold">2</span> ** <span style="color:#036; font-weight:bold">Counter</span>::<span style="color:#036; font-weight:bold">Size</span>
@@ -2210,11 +2210,11 @@
<div class="formal">
<div class="example" id="fig:xUnit_counter_spec.rb">
- <p class="title"><a href="#a-607126978">Example 7</a>. Specification implemented in xUnit format</p>
+ <p class="title"><a href="#a-607464928">Example 7</a>. Specification implemented in xUnit format</p>
<pre class="code">require <span style="background-color:#fff0f0"><span style="color:#710">'</span><span style="color:#D20">test/unit</span><span style="color:#710">'</span></span>
<span style="color:#888"># lowest upper bound of counter's value</span>
<span style="color:#036; font-weight:bold">LIMIT</span> = <span style="color:#00D; font-weight:bold">2</span> ** <span style="color:#036; font-weight:bold">Counter</span>::<span style="color:#036; font-weight:bold">Size</span>
@@ -2270,11 +2270,11 @@
<p>
<hr style="display: none"/>
<div id="usage.tutorial.implement-proto" class="section">
<h3 class="title">
- <a href="#a-607137798">5.6.4</a>
+ <a href="#a-607475748">5.6.4</a>
Implement the prototype
</h3>
@@ -2287,11 +2287,11 @@
<div class="formal">
<div class="example" id="fig:counter_proto.rb">
- <p class="title"><a href="#a-607134398">Example 8</a>. Ruby prototype of our Verilog design</p>
+ <p class="title"><a href="#a-607472348">Example 8</a>. Ruby prototype of our Verilog design</p>
<pre class="code"><span style="color:#888"># Ruby prototype of the design under test's Verilog implementation.</span>
<span style="color:#080; font-weight:bold">def</span> <span style="color:#06B; font-weight:bold">feign!</span>
<span style="color:#080; font-weight:bold">if</span> clock.posedge?
<span style="color:#080; font-weight:bold">if</span> reset.high?
@@ -2314,11 +2314,11 @@
<p>
<hr style="display: none"/>
<div id="usage.tutorial.test-proto" class="section">
<h3 class="title">
- <a href="#a-607151048">5.6.5</a>
+ <a href="#a-607231778">5.6.5</a>
Verify the prototype
</h3>
@@ -2334,11 +2334,11 @@
<div class="formal">
<div class="example" id="fig:test-proto.RSpec">
- <p class="title"><a href="#a-607140918">Example 9</a>. Running a test with specification in RSpec format</p>
+ <p class="title"><a href="#a-607478868">Example 9</a>. Running a test with specification in RSpec format</p>
<pre>
$ cd RSpec
$ rake cver PROTOTYPE=1
@@ -2358,11 +2358,11 @@
<div class="formal">
<div class="example" id="fig:test-proto.unit-test">
- <p class="title"><a href="#a-607143418">Example 10</a>. Running a test with specification in xUnit format</p>
+ <p class="title"><a href="#a-607481368">Example 10</a>. Running a test with specification in xUnit format</p>
<pre>
$ cd xUnit
$ rake cver PROTOTYPE=1
@@ -2382,11 +2382,11 @@
<div class="admonition">
<div class="tip" id="What_can_the_test_runner_do_">
<img src="images/tango/tip.png" alt="tip" class="icon"/>
- <p class="title"><a href="#a-607145688">Tip 4</a>. What can the test runner do?</p>
+ <p class="title"><a href="#a-607223748">Tip 4</a>. What can the test runner do?</p>
If you invoke the test runner (1) without any arguments or (2) with the <tt>--tasks</tt> option, it will show you a list of tasks that it can perform for you.
</div>
</div>
</p>
@@ -2398,11 +2398,11 @@
<p>
<hr style="display: none"/>
<div id="usage.tutorial.implement-design" class="section">
<h3 class="title">
- <a href="#a-607157038">5.6.6</a>
+ <a href="#a-607245728">5.6.6</a>
Implement the design
</h3>
@@ -2415,11 +2415,11 @@
<div class="formal">
<div class="example" id="fig:counter.v_impl">
- <p class="title"><a href="#a-607153638">Example 11</a>. Implementation of a simple up-counter with synchronous reset</p>
+ <p class="title"><a href="#a-607235998">Example 11</a>. Implementation of a simple up-counter with synchronous reset</p>
<pre class="code" lang="verilog">/**
A simple up-counter with synchronous reset.
@param Size Number of bits used to represent the counter's value.
@@ -2452,11 +2452,11 @@
<p>
<hr style="display: none"/>
<div id="usage.tutorial.test-design" class="section">
<h3 class="title">
- <a href="#a-606917698">5.6.7</a>
+ <a href="#a-607263938">5.6.7</a>
Verify the design
</h3>
@@ -2472,11 +2472,11 @@
<div class="formal">
<div class="example" id="fig:test-design.RSpec">
- <p class="title"><a href="#a-607159998">Example 12</a>. Running a test with specification in RSpec format</p>
+ <p class="title"><a href="#a-607252508">Example 12</a>. Running a test with specification in RSpec format</p>
<pre>
$ cd RSpec
$ rake cver
@@ -2494,11 +2494,11 @@
<div class="formal">
<div class="example" id="fig:test-design.unit-test">
- <p class="title"><a href="#a-606910818">Example 13</a>. Running a test with specification in xUnit format</p>
+ <p class="title"><a href="#a-607255018">Example 13</a>. Running a test with specification in xUnit format</p>
<pre>
$ cd xUnit
$ rake cver
@@ -2523,11 +2523,11 @@
<hr style="display: none"/>
<div id="hacking" class="chapter">
<h1 class="title">
- Chapter <a href="#a-607168058">6</a>
+ Chapter <a href="#a-607500728">6</a>
<br/><br/>
<big>Hacking</big>
</h1>
@@ -2535,11 +2535,11 @@
<p>
<hr style="display: none"/>
<div id="hacking.scm" class="section">
<h2 class="title">
- <a href="#a-607153878">6.1</a>
+ <a href="#a-607491268">6.1</a>
Getting the source code
</h2>
@@ -2556,11 +2556,11 @@
<p>
<hr style="display: none"/>
<div id="hacking.release-packages" class="section">
<h2 class="title">
- <a href="#a-607161228">6.2</a>
+ <a href="#a-607493898">6.2</a>
Building release packages
</h2>
@@ -2584,11 +2584,11 @@
<p>
<hr style="display: none"/>
<div id="hacking.manual" class="section">
<h2 class="title">
- <a href="#a-607163458">6.3</a>
+ <a href="#a-607496128">6.3</a>
Editing this manual
</h2>
@@ -2602,11 +2602,11 @@
<hr style="display: none"/>
<div id="problems" class="chapter">
<h1 class="title">
- Chapter <a href="#a-607224248">7</a>
+ Chapter <a href="#a-607556918">7</a>
<br/><br/>
<big>Known problems</big>
</h1>
@@ -2617,11 +2617,11 @@
<p>
<hr style="display: none"/>
<div id="problem.ivl" class="section">
<h2 class="title">
- <a href="#a-607196648">7.1</a>
+ <a href="#a-607529318">7.1</a>
Icarus Verilog
</h2>
@@ -2632,11 +2632,11 @@
<p>
<hr style="display: none"/>
<div id="problems.ivl.vpi_handle_by_name.absolute-paths" class="section">
<h3 class="title">
- <a href="#a-607174028">7.1.1</a>
+ <a href="#a-607506698">7.1.1</a>
Give full paths to Verilog objects
</h3>
@@ -2652,11 +2652,11 @@
<div class="formal">
<div class="example" id="ex:TestFoo">
- <p class="title"><a href="#a-607170868">Example 14</a>. Part of a bench which instantiates a Verilog design</p>
+ <p class="title"><a href="#a-607503538">Example 14</a>. Part of a bench which instantiates a Verilog design</p>
<pre class="code" lang="verilog">
module TestFoo;
reg clk_reg;
Foo my_foo(.clk(clk_reg));
@@ -2671,11 +2671,11 @@
<hr style="display: none"/>
<div id="problems.ivl.vpi_handle_by_name.connect-registers" class="section">
<h3 class="title">
- <a href="#a-607183718">7.1.2</a>
+ <a href="#a-607516388">7.1.2</a>
Registers must be connected
</h3>
@@ -2694,11 +2694,11 @@
<div class="formal">
<div class="example" id="ex:TestFoo_bad">
- <p class="title"><a href="#a-607176928">Example 15</a>. Bad design with unconnected registers</p>
+ <p class="title"><a href="#a-607509598">Example 15</a>. Bad design with unconnected registers</p>
Here the <code class="code">clk_reg</code> register is not connected to anything.
<pre class="code" lang="verilog">
@@ -2714,11 +2714,11 @@
<div class="formal">
<div class="example" id="ex:TestFoo_fix">
- <p class="title"><a href="#a-607179368">Example 16</a>. Fixed design with wired registers</p>
+ <p class="title"><a href="#a-607512038">Example 16</a>. Fixed design with wired registers</p>
Here the <code class="code">clk_reg</code> register is connected to the <code class="code">clk_wire</code> wire.
<pre class="code" lang="verilog">
@@ -2737,11 +2737,11 @@
<hr style="display: none"/>
<div id="problems.ivl.vpi_reset" class="section">
<h3 class="title">
- <a href="#a-607185968">7.1.3</a>
+ <a href="#a-607518638">7.1.3</a>
Vpi::reset
</h3>
@@ -2756,11 +2756,11 @@
<hr style="display: none"/>
<div id="problem.ncsim" class="section">
<h2 class="title">
- <a href="#a-607202038">7.2</a>
+ <a href="#a-607534708">7.2</a>
Cadence NC-Sim
</h2>
@@ -2771,11 +2771,11 @@
<p>
<hr style="display: none"/>
<div id="problem.ncsim.vpiForceFlag" class="section">
<h3 class="title">
- <a href="#a-607199078">7.2.1</a>
+ <a href="#a-607531748">7.2.1</a>
Cannot force values onto handles
</h3>
@@ -2798,11 +2798,11 @@
<hr style="display: none"/>
<div id="glossary" class="chapter">
<h1 class="title">
- Chapter <a href="#a-607256698">8</a>
+ Chapter <a href="#a-607589368">8</a>
<br/><br/>
<big>Glossary</big>
</h1>
@@ -2810,11 +2810,11 @@
<hr style="display: none"/>
<div id="glossary.test" class="section">
<h2 class="title">
- <a href="#a-607227078">8.1</a>
+ <a href="#a-607559748">8.1</a>
Test
</h2>
@@ -2826,11 +2826,11 @@
<hr style="display: none"/>
<div id="glossary.design" class="section">
<h2 class="title">
- <a href="#a-607229578">8.2</a>
+ <a href="#a-607562248">8.2</a>
Design
</h2>
@@ -2842,11 +2842,11 @@
<hr style="display: none"/>
<div id="glossary.specification" class="section">
<h2 class="title">
- <a href="#a-607232338">8.3</a>
+ <a href="#a-607565008">8.3</a>
Specification
</h2>
@@ -2858,11 +2858,11 @@
<hr style="display: none"/>
<div id="glossary.expectation" class="section">
<h2 class="title">
- <a href="#a-607234558">8.4</a>
+ <a href="#a-607567228">8.4</a>
Expectation
</h2>
@@ -2874,11 +2874,11 @@
<hr style="display: none"/>
<div id="glossary.handle" class="section">
<h2 class="title">
- <a href="#a-607237038">8.5</a>
+ <a href="#a-607569708">8.5</a>
Handle
</h2>
@@ -2890,11 +2890,11 @@
<hr style="display: none"/>
<div id="glossary.rake" class="section">
<h2 class="title">
- <a href="#a-607239298">8.6</a>
+ <a href="#a-607571968">8.6</a>
Rake
</h2>
@@ -2911,11 +2911,11 @@
<hr style="display: none"/>
<div id="glossary.RSpec" class="section">
<h2 class="title">
- <a href="#a-607241838">8.7</a>
+ <a href="#a-607574508">8.7</a>
RSpec
</h2>
@@ -2930,11 +2930,11 @@
<hr style="display: none"/>
<div id="glossary.TDD" class="section">
<h2 class="title">
- <a href="#a-607244098">8.8</a>
+ <a href="#a-607576768">8.8</a>
Test driven development
</h2>
@@ -2949,11 +2949,11 @@
<hr style="display: none"/>
<div id="glossary.BDD" class="section">
<h2 class="title">
- <a href="#a-607246358">8.9</a>
+ <a href="#a-607579028">8.9</a>
Behavior driven development
</h2>
@@ -2969,52 +2969,52 @@
</div>
<hr style="display: none"/>
<div id="toc">
<h1 id="toc:contents">Contents</h1>
- <ul><li><span class="hide">1 </span><a id="a-605815698" href="#Ruby-VPI_18.0.1_user_manual">Ruby-VPI 18.0.1 user manual</a><ul><li><span class="hide">1.1 </span><a id="a-605717698" href="#About_this_manual">About this manual</a></li><li><span class="hide">1.2 </span><a id="a-605744638" href="#Legal_notice">Legal notice</a></li></ul></li><li><span class="hide">2 </span><a id="a-606978988" href="#intro">Welcome</a><ul><li><span class="hide">2.1 </span><a id="a-606913148" href="#resources">Resources</a><ul><li><span class="hide">2.1.1 </span><a id="a-605838518" href="#Records">Records</a></li><li><span class="hide">2.1.2 </span><a id="a-605610268" href="#Documentation">Documentation</a></li><li><span class="hide">2.1.3 </span><a id="a-606907548" href="#Facilities">Facilities</a></li></ul></li><li><span class="hide">2.2 </span><a id="a-606925458" href="#intro.features">Features</a><ul><li><span class="hide">2.2.1 </span><a id="a-606915788" href="#Portable">Portable</a></li><li><span class="hide">2.2.2 </span><a id="a-606918188" href="#Agile">Agile</a></li><li><span class="hide">2.2.3 </span><a id="a-606920588" href="#Powerful">Powerful</a></li></ul></li><li><span class="hide">2.3 </span><a id="a-606937688" href="#intro.reqs">Requirements</a><ul><li><span class="hide">2.3.1 </span><a id="a-606928098" href="#Verilog_simulator">Verilog simulator</a></li><li><span class="hide">2.3.2 </span><a id="a-606930538" href="#Compilers">Compilers</a></li><li><span class="hide">2.3.3 </span><a id="a-606932858" href="#Libraries">Libraries</a></li></ul></li><li><span class="hide">2.4 </span><a id="a-606940248" href="#intro.applications">Applications</a></li><li><span class="hide">2.5 </span><a id="a-606942848" href="#intro.appetizers">Appetizers</a></li><li><span class="hide">2.6 </span><a id="a-606945718" href="#intro.license">License</a></li><li><span class="hide">2.7 </span><a id="a-606951108" href="#intro.related-works">Related works</a><ul><li><span class="hide">2.7.1 </span><a id="a-606948168" href="#intro.related-works.pli">Ye olde PLI</a></li></ul></li></ul></li><li><span class="hide">3 </span><a id="a-607019648" href="#setup">Setup</a><ul><li><span class="hide">3.1 </span><a id="a-606982178" href="#setup.manifest">Manifest</a></li><li><span class="hide">3.2 </span><a id="a-606987618" href="#setup.reqs">Requirements</a></li><li><span class="hide">3.3 </span><a id="a-606993788" href="#setup.recom">Recommendations</a><ul><li><span class="hide">3.3.1 </span><a id="a-606990448" href="#setup.recom.merger">Text merging tool</a></li></ul></li><li><span class="hide">3.4 </span><a id="a-607002928" href="#setup.inst">Installation</a><ul><li><span class="hide">3.4.1 </span><a id="a-606998868" href="#setup.inst.windows">Installing on Windows</a></li></ul></li><li><span class="hide">3.5 </span><a id="a-607005208" href="#setup.maintenance">Maintenance</a></li></ul></li><li><span class="hide">4 </span><a id="a-607025428" href="#organization">Organization</a><ul><li><span class="hide">4.1 </span><a id="a-607028538" href="#overview.relay">Ruby/Verilog interaction</a></li><li><span class="hide">4.2 </span><a id="a-607034108" href="#organization.tests">Tests</a></li><li><span class="hide">4.3 </span><a id="a-606948098" href="#VPI_in_Ruby">VPI in Ruby</a><ul><li><span class="hide">4.3.1 </span><a id="a-607043028" href="#Deviations_from_the_VPI_standard">Deviations from the VPI standard</a><ul><li><span class="hide">4.3.1.1 </span><a id="a-607036598" href="#Names_are_capitalized">Names are capitalized</a></li><li><span class="hide">4.3.1.2 </span><a id="a-607039098" href="#a_vprintf__is__printf_"><code class="code">vprintf</code> is <code class="code">printf</code></a></li></ul></li><li><span class="hide">4.3.2 </span><a id="a-607068568" href="#vpi.handles">Handles</a><ul><li><span class="hide">4.3.2.1 </span><a id="a-607045688" href="#Shortcuts_for_productivity">Shortcuts for productivity</a></li><li><span class="hide">4.3.2.2 </span><a id="a-607048248" href="#Accessing_a_handle_s_relatives">Accessing a handle’s relatives</a></li><li><span class="hide">4.3.2.3 </span><a id="a-607051188" href="#Accessing_a_handle_s_properties">Accessing a handle’s properties</a></li></ul></li><li><span class="hide">4.3.3 </span><a id="a-607076998" href="#vpi.callbacks">Callbacks</a></li></ul></li></ul></li><li><span class="hide">5 </span><a id="a-607149688" href="#usage">Usage</a><ul><li><span class="hide">5.1 </span><a id="a-607049328" href="#usage.prototyping">Prototyping</a><ul><li><span class="hide">5.1.1 </span><a id="a-607035478" href="#Getting_started">Getting started</a></li><li><span class="hide">5.1.2 </span><a id="a-607039268" href="#How_does_prototyping_work_">How does prototyping work?</a></li></ul></li><li><span class="hide">5.2 </span><a id="a-607058778" href="#usage.debugger">Debugging</a><ul><li><span class="hide">5.2.1 </span><a id="a-607053478" href="#usage.debugger.init">Advanced initialization</a></li></ul></li><li><span class="hide">5.3 </span><a id="a-607082308" href="#usage.test-runner">Test runner</a><ul><li><span class="hide">5.3.1 </span><a id="a-607072228" href="#usage.test-runner.env-vars">Environment variables</a><ul><li><span class="hide">5.3.1.1 </span><a id="a-607063028" href="#Variables_as_command-line_arguments">Variables as command-line arguments</a></li></ul></li></ul></li><li><span class="hide">5.4 </span><a id="a-607101458" href="#usage.tools">Tools</a><ul><li><span class="hide">5.4.1 </span><a id="a-607091638" href="#usage.tools.generate">Automated test generation</a></li><li><span class="hide">5.4.2 </span><a id="a-607093928" href="#usage.tools.convert">Verilog to Ruby conversion</a></li></ul></li><li><span class="hide">5.5 </span><a id="a-607103698" href="#usage.examples">Sample tests</a></li><li><span class="hide">5.6 </span><a id="a-606970248" href="#usage.tutorial">Tutorial</a><ul><li><span class="hide">5.6.1 </span><a id="a-607111108" href="#usage.tutorial.declare-design">Start with a Verilog design</a></li><li><span class="hide">5.6.2 </span><a id="a-607121708" href="#usage.tutorial.generate-test">Generate a test</a></li><li><span class="hide">5.6.3 </span><a id="a-607131808" href="#usage.tutorial.specification">Specify your expectations</a></li><li><span class="hide">5.6.4 </span><a id="a-607137798" href="#usage.tutorial.implement-proto">Implement the prototype</a></li><li><span class="hide">5.6.5 </span><a id="a-607151048" href="#usage.tutorial.test-proto">Verify the prototype</a></li><li><span class="hide">5.6.6 </span><a id="a-607157038" href="#usage.tutorial.implement-design">Implement the design</a></li><li><span class="hide">5.6.7 </span><a id="a-606917698" href="#usage.tutorial.test-design">Verify the design</a></li></ul></li></ul></li><li><span class="hide">6 </span><a id="a-607168058" href="#hacking">Hacking</a><ul><li><span class="hide">6.1 </span><a id="a-607153878" href="#hacking.scm">Getting the source code</a></li><li><span class="hide">6.2 </span><a id="a-607161228" href="#hacking.release-packages">Building release packages</a></li><li><span class="hide">6.3 </span><a id="a-607163458" href="#hacking.manual">Editing this manual</a></li></ul></li><li><span class="hide">7 </span><a id="a-607224248" href="#problems">Known problems</a><ul><li><span class="hide">7.1 </span><a id="a-607196648" href="#problem.ivl">Icarus Verilog</a><ul><li><span class="hide">7.1.1 </span><a id="a-607174028" href="#problems.ivl.vpi_handle_by_name.absolute-paths">Give full paths to Verilog objects</a></li><li><span class="hide">7.1.2 </span><a id="a-607183718" href="#problems.ivl.vpi_handle_by_name.connect-registers">Registers must be connected</a></li><li><span class="hide">7.1.3 </span><a id="a-607185968" href="#problems.ivl.vpi_reset">Vpi::reset</a></li></ul></li><li><span class="hide">7.2 </span><a id="a-607202038" href="#problem.ncsim">Cadence NC-Sim</a><ul><li><span class="hide">7.2.1 </span><a id="a-607199078" href="#problem.ncsim.vpiForceFlag">Cannot force values onto handles</a></li></ul></li></ul></li><li><span class="hide">8 </span><a id="a-607256698" href="#glossary">Glossary</a><ul><li><span class="hide">8.1 </span><a id="a-607227078" href="#glossary.test">Test</a></li><li><span class="hide">8.2 </span><a id="a-607229578" href="#glossary.design">Design</a></li><li><span class="hide">8.3 </span><a id="a-607232338" href="#glossary.specification">Specification</a></li><li><span class="hide">8.4 </span><a id="a-607234558" href="#glossary.expectation">Expectation</a></li><li><span class="hide">8.5 </span><a id="a-607237038" href="#glossary.handle">Handle</a></li><li><span class="hide">8.6 </span><a id="a-607239298" href="#glossary.rake">Rake</a></li><li><span class="hide">8.7 </span><a id="a-607241838" href="#glossary.RSpec">RSpec</a></li><li><span class="hide">8.8 </span><a id="a-607244098" href="#glossary.TDD">Test driven development</a></li><li><span class="hide">8.9 </span><a id="a-607246358" href="#glossary.BDD">Behavior driven development</a></li></ul></li></ul>
+ <ul><li><span class="hide">1 </span><a id="a-607241338" href="#Ruby-VPI_18.0.2_user_manual">Ruby-VPI 18.0.2 user manual</a><ul><li><span class="hide">1.1 </span><a id="a-607234498" href="#About_this_manual">About this manual</a></li><li><span class="hide">1.2 </span><a id="a-607237028" href="#Legal_notice">Legal notice</a></li></ul></li><li><span class="hide">2 </span><a id="a-607321098" href="#intro">Welcome</a><ul><li><span class="hide">2.1 </span><a id="a-607255258" href="#resources">Resources</a><ul><li><span class="hide">2.1.1 </span><a id="a-607244578" href="#Records">Records</a></li><li><span class="hide">2.1.2 </span><a id="a-607246958" href="#Documentation">Documentation</a></li><li><span class="hide">2.1.3 </span><a id="a-607249658" href="#Facilities">Facilities</a></li></ul></li><li><span class="hide">2.2 </span><a id="a-607267568" href="#intro.features">Features</a><ul><li><span class="hide">2.2.1 </span><a id="a-607257898" href="#Portable">Portable</a></li><li><span class="hide">2.2.2 </span><a id="a-607260298" href="#Agile">Agile</a></li><li><span class="hide">2.2.3 </span><a id="a-607262698" href="#Powerful">Powerful</a></li></ul></li><li><span class="hide">2.3 </span><a id="a-607279798" href="#intro.reqs">Requirements</a><ul><li><span class="hide">2.3.1 </span><a id="a-607270208" href="#Verilog_simulator">Verilog simulator</a></li><li><span class="hide">2.3.2 </span><a id="a-607272648" href="#Compilers">Compilers</a></li><li><span class="hide">2.3.3 </span><a id="a-607274968" href="#Libraries">Libraries</a></li></ul></li><li><span class="hide">2.4 </span><a id="a-607282358" href="#intro.applications">Applications</a></li><li><span class="hide">2.5 </span><a id="a-607284958" href="#intro.appetizers">Appetizers</a></li><li><span class="hide">2.6 </span><a id="a-607287828" href="#intro.license">License</a></li><li><span class="hide">2.7 </span><a id="a-607293218" href="#intro.related-works">Related works</a><ul><li><span class="hide">2.7.1 </span><a id="a-607290278" href="#intro.related-works.pli">Ye olde PLI</a></li></ul></li></ul></li><li><span class="hide">3 </span><a id="a-607361758" href="#setup">Setup</a><ul><li><span class="hide">3.1 </span><a id="a-607324288" href="#setup.manifest">Manifest</a></li><li><span class="hide">3.2 </span><a id="a-607329728" href="#setup.reqs">Requirements</a></li><li><span class="hide">3.3 </span><a id="a-607335898" href="#setup.recom">Recommendations</a><ul><li><span class="hide">3.3.1 </span><a id="a-607332558" href="#setup.recom.merger">Text merging tool</a></li></ul></li><li><span class="hide">3.4 </span><a id="a-607345038" href="#setup.inst">Installation</a><ul><li><span class="hide">3.4.1 </span><a id="a-607340978" href="#setup.inst.windows">Installing on Windows</a></li></ul></li><li><span class="hide">3.5 </span><a id="a-607347318" href="#setup.maintenance">Maintenance</a></li></ul></li><li><span class="hide">4 </span><a id="a-607368998" href="#organization">Organization</a><ul><li><span class="hide">4.1 </span><a id="a-607370648" href="#overview.relay">Ruby/Verilog interaction</a></li><li><span class="hide">4.2 </span><a id="a-607376218" href="#organization.tests">Tests</a></li><li><span class="hide">4.3 </span><a id="a-607291858" href="#VPI_in_Ruby">VPI in Ruby</a><ul><li><span class="hide">4.3.1 </span><a id="a-607385138" href="#Deviations_from_the_VPI_standard">Deviations from the VPI standard</a><ul><li><span class="hide">4.3.1.1 </span><a id="a-607378708" href="#Names_are_capitalized">Names are capitalized</a></li><li><span class="hide">4.3.1.2 </span><a id="a-607381208" href="#a_vprintf__is__printf_"><code class="code">vprintf</code> is <code class="code">printf</code></a></li></ul></li><li><span class="hide">4.3.2 </span><a id="a-607236168" href="#vpi.handles">Handles</a><ul><li><span class="hide">4.3.2.1 </span><a id="a-607387798" href="#Shortcuts_for_productivity">Shortcuts for productivity</a></li><li><span class="hide">4.3.2.2 </span><a id="a-607390358" href="#Accessing_a_handle_s_relatives">Accessing a handle’s relatives</a></li><li><span class="hide">4.3.2.3 </span><a id="a-607393298" href="#Accessing_a_handle_s_properties">Accessing a handle’s properties</a></li></ul></li><li><span class="hide">4.3.3 </span><a id="a-607249768" href="#vpi.callbacks">Callbacks</a></li></ul></li></ul></li><li><span class="hide">5 </span><a id="a-607488938" href="#usage">Usage</a><ul><li><span class="hide">5.1 </span><a id="a-607395418" href="#usage.prototyping">Prototyping</a><ul><li><span class="hide">5.1.1 </span><a id="a-607378568" href="#Getting_started">Getting started</a></li><li><span class="hide">5.1.2 </span><a id="a-607383008" href="#How_does_prototyping_work_">How does prototyping work?</a></li></ul></li><li><span class="hide">5.2 </span><a id="a-607403488" href="#usage.debugger">Debugging</a><ul><li><span class="hide">5.2.1 </span><a id="a-607400418" href="#usage.debugger.init">Advanced initialization</a></li></ul></li><li><span class="hide">5.3 </span><a id="a-607420258" href="#usage.test-runner">Test runner</a><ul><li><span class="hide">5.3.1 </span><a id="a-607413148" href="#usage.test-runner.env-vars">Environment variables</a><ul><li><span class="hide">5.3.1.1 </span><a id="a-607406578" href="#Variables_as_command-line_arguments">Variables as command-line arguments</a></li></ul></li></ul></li><li><span class="hide">5.4 </span><a id="a-607439408" href="#usage.tools">Tools</a><ul><li><span class="hide">5.4.1 </span><a id="a-607429588" href="#usage.tools.generate">Automated test generation</a></li><li><span class="hide">5.4.2 </span><a id="a-607431878" href="#usage.tools.convert">Verilog to Ruby conversion</a></li></ul></li><li><span class="hide">5.5 </span><a id="a-607441648" href="#usage.examples">Sample tests</a></li><li><span class="hide">5.6 </span><a id="a-607314468" href="#usage.tutorial">Tutorial</a><ul><li><span class="hide">5.6.1 </span><a id="a-607449058" href="#usage.tutorial.declare-design">Start with a Verilog design</a></li><li><span class="hide">5.6.2 </span><a id="a-607459658" href="#usage.tutorial.generate-test">Generate a test</a></li><li><span class="hide">5.6.3 </span><a id="a-607469758" href="#usage.tutorial.specification">Specify your expectations</a></li><li><span class="hide">5.6.4 </span><a id="a-607475748" href="#usage.tutorial.implement-proto">Implement the prototype</a></li><li><span class="hide">5.6.5 </span><a id="a-607231778" href="#usage.tutorial.test-proto">Verify the prototype</a></li><li><span class="hide">5.6.6 </span><a id="a-607245728" href="#usage.tutorial.implement-design">Implement the design</a></li><li><span class="hide">5.6.7 </span><a id="a-607263938" href="#usage.tutorial.test-design">Verify the design</a></li></ul></li></ul></li><li><span class="hide">6 </span><a id="a-607500728" href="#hacking">Hacking</a><ul><li><span class="hide">6.1 </span><a id="a-607491268" href="#hacking.scm">Getting the source code</a></li><li><span class="hide">6.2 </span><a id="a-607493898" href="#hacking.release-packages">Building release packages</a></li><li><span class="hide">6.3 </span><a id="a-607496128" href="#hacking.manual">Editing this manual</a></li></ul></li><li><span class="hide">7 </span><a id="a-607556918" href="#problems">Known problems</a><ul><li><span class="hide">7.1 </span><a id="a-607529318" href="#problem.ivl">Icarus Verilog</a><ul><li><span class="hide">7.1.1 </span><a id="a-607506698" href="#problems.ivl.vpi_handle_by_name.absolute-paths">Give full paths to Verilog objects</a></li><li><span class="hide">7.1.2 </span><a id="a-607516388" href="#problems.ivl.vpi_handle_by_name.connect-registers">Registers must be connected</a></li><li><span class="hide">7.1.3 </span><a id="a-607518638" href="#problems.ivl.vpi_reset">Vpi::reset</a></li></ul></li><li><span class="hide">7.2 </span><a id="a-607534708" href="#problem.ncsim">Cadence NC-Sim</a><ul><li><span class="hide">7.2.1 </span><a id="a-607531748" href="#problem.ncsim.vpiForceFlag">Cannot force values onto handles</a></li></ul></li></ul></li><li><span class="hide">8 </span><a id="a-607589368" href="#glossary">Glossary</a><ul><li><span class="hide">8.1 </span><a id="a-607559748" href="#glossary.test">Test</a></li><li><span class="hide">8.2 </span><a id="a-607562248" href="#glossary.design">Design</a></li><li><span class="hide">8.3 </span><a id="a-607565008" href="#glossary.specification">Specification</a></li><li><span class="hide">8.4 </span><a id="a-607567228" href="#glossary.expectation">Expectation</a></li><li><span class="hide">8.5 </span><a id="a-607569708" href="#glossary.handle">Handle</a></li><li><span class="hide">8.6 </span><a id="a-607571968" href="#glossary.rake">Rake</a></li><li><span class="hide">8.7 </span><a id="a-607574508" href="#glossary.RSpec">RSpec</a></li><li><span class="hide">8.8 </span><a id="a-607576768" href="#glossary.TDD">Test driven development</a></li><li><span class="hide">8.9 </span><a id="a-607579028" href="#glossary.BDD">Behavior driven development</a></li></ul></li></ul>
<h1 id="toc:tip">Tips</h1>
<ol>
- <li><a href="#Add_support_for_your_Verilog_simulator" id="a-606984648">Add support for your Verilog simulator</a></li>
- <li><a href="#Tuning_for_maximum_performance" id="a-606996338">Tuning for maximum performance</a></li>
- <li><a href="#Using__kdiff3__with_the_automated_test_generator." id="a-607087558">Using <strong>kdiff3</strong> with the automated test generator.</a></li>
- <li><a href="#What_can_the_test_runner_do_" id="a-607145688">What can the test runner do?</a></li>
+ <li><a href="#Add_support_for_your_Verilog_simulator" id="a-607326758">Add support for your Verilog simulator</a></li>
+ <li><a href="#Tuning_for_maximum_performance" id="a-607338448">Tuning for maximum performance</a></li>
+ <li><a href="#Using__kdiff3__with_the_automated_test_generator." id="a-607425508">Using <strong>kdiff3</strong> with the automated test generator.</a></li>
+ <li><a href="#What_can_the_test_runner_do_" id="a-607223748">What can the test runner do?</a></li>
</ol>
<h1 id="toc:caution">Cautions</h1>
<ol>
- <li><a href="#Do_not_rename_generated_files" id="a-607085068">Do not rename generated files</a></li>
+ <li><a href="#Do_not_rename_generated_files" id="a-607423018">Do not rename generated files</a></li>
</ol>
<h1 id="toc:figure">Figures</h1>
<ol>
- <li><a href="#fig:organization.detail" id="a-607022248">Where does Ruby-VPI fit in?</a></li>
- <li><a href="#fig:ruby_relay" id="a-607025058">Interaction between Ruby and Verilog</a></li>
- <li><a href="#fig:organization" id="a-607031008">Organization of a test in Ruby-VPI</a></li>
- <li><a href="#fig:method_naming_format" id="a-607053988">Method naming format for accessing a handle’s properties</a></li>
+ <li><a href="#fig:organization.detail" id="a-607364358">Where does Ruby-VPI fit in?</a></li>
+ <li><a href="#fig:ruby_relay" id="a-607367168">Interaction between Ruby and Verilog</a></li>
+ <li><a href="#fig:organization" id="a-607373118">Organization of a test in Ruby-VPI</a></li>
+ <li><a href="#fig:method_naming_format" id="a-607396098">Method naming format for accessing a handle’s properties</a></li>
</ol>
<h1 id="toc:table">Tables</h1>
<ol>
- <li><a href="#tbl:accessors" id="a-607056418">Possible accessors and their implications</a></li>
- <li><a href="#ex:properties" id="a-607059358">Examples of accessing a handle’s properties</a></li>
+ <li><a href="#tbl:accessors" id="a-607398528">Possible accessors and their implications</a></li>
+ <li><a href="#ex:properties" id="a-607223948">Examples of accessing a handle’s properties</a></li>
</ol>
<h1 id="toc:example">Examples</h1>
<ol>
- <li><a href="#ex:callback" id="a-607072518">Using a callback for value change notification</a></li>
- <li><a href="#Running_a_test_with_environment_variables" id="a-607065588">Running a test with environment variables</a></li>
- <li><a href="#fig:counter.v_decl" id="a-607107598">Declaration of a simple up-counter with synchronous reset</a></li>
- <li><a href="#fig:generate-test.RSpec" id="a-607114448">Generating a test with specification in RSpec format</a></li>
- <li><a href="#fig:generate-test.xUnit" id="a-607116908">Generating a test with specification in xUnit format</a></li>
- <li><a href="#fig:RSpec_counter_spec.rb" id="a-607124618">Specification implemented in RSpec format</a></li>
- <li><a href="#fig:xUnit_counter_spec.rb" id="a-607126978">Specification implemented in xUnit format</a></li>
- <li><a href="#fig:counter_proto.rb" id="a-607134398">Ruby prototype of our Verilog design</a></li>
- <li><a href="#fig:test-proto.RSpec" id="a-607140918">Running a test with specification in RSpec format</a></li>
- <li><a href="#fig:test-proto.unit-test" id="a-607143418">Running a test with specification in xUnit format</a></li>
- <li><a href="#fig:counter.v_impl" id="a-607153638">Implementation of a simple up-counter with synchronous reset</a></li>
- <li><a href="#fig:test-design.RSpec" id="a-607159998">Running a test with specification in RSpec format</a></li>
- <li><a href="#fig:test-design.unit-test" id="a-606910818">Running a test with specification in xUnit format</a></li>
- <li><a href="#ex:TestFoo" id="a-607170868">Part of a bench which instantiates a Verilog design</a></li>
- <li><a href="#ex:TestFoo_bad" id="a-607176928">Bad design with unconnected registers</a></li>
- <li><a href="#ex:TestFoo_fix" id="a-607179368">Fixed design with wired registers</a></li>
+ <li><a href="#ex:callback" id="a-607242918">Using a callback for value change notification</a></li>
+ <li><a href="#Running_a_test_with_environment_variables" id="a-607408978">Running a test with environment variables</a></li>
+ <li><a href="#fig:counter.v_decl" id="a-607445548">Declaration of a simple up-counter with synchronous reset</a></li>
+ <li><a href="#fig:generate-test.RSpec" id="a-607452398">Generating a test with specification in RSpec format</a></li>
+ <li><a href="#fig:generate-test.xUnit" id="a-607454858">Generating a test with specification in xUnit format</a></li>
+ <li><a href="#fig:RSpec_counter_spec.rb" id="a-607462568">Specification implemented in RSpec format</a></li>
+ <li><a href="#fig:xUnit_counter_spec.rb" id="a-607464928">Specification implemented in xUnit format</a></li>
+ <li><a href="#fig:counter_proto.rb" id="a-607472348">Ruby prototype of our Verilog design</a></li>
+ <li><a href="#fig:test-proto.RSpec" id="a-607478868">Running a test with specification in RSpec format</a></li>
+ <li><a href="#fig:test-proto.unit-test" id="a-607481368">Running a test with specification in xUnit format</a></li>
+ <li><a href="#fig:counter.v_impl" id="a-607235998">Implementation of a simple up-counter with synchronous reset</a></li>
+ <li><a href="#fig:test-design.RSpec" id="a-607252508">Running a test with specification in RSpec format</a></li>
+ <li><a href="#fig:test-design.unit-test" id="a-607255018">Running a test with specification in xUnit format</a></li>
+ <li><a href="#ex:TestFoo" id="a-607503538">Part of a bench which instantiates a Verilog design</a></li>
+ <li><a href="#ex:TestFoo_bad" id="a-607509598">Bad design with unconnected registers</a></li>
+ <li><a href="#ex:TestFoo_fix" id="a-607512038">Fixed design with wired registers</a></li>
</ol>
</div>
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