Contents

# Simulates the design under test for one clock cycle.
def cycle!
  clock.high!
  advance_time
  clock.low!
  advance_time
end

# Brings the design under test into a blank state.
def reset!
  reset.high!
  cycle!
  reset.low!
end

Version data entries

10 entries across 5 versions & 1 rubygems

Version	Path
ruby-vpi-17.0.0	samp/counter/xUnit/counter_design.rb
ruby-vpi-18.0.0	samp/counter/xUnit/counter_design.rb
ruby-vpi-18.0.0	samp/counter/RSpec/counter_design.rb
ruby-vpi-17.0.0	samp/counter/RSpec/counter_design.rb
ruby-vpi-19.0.0	examples/counter/RSpec/counter_design.rb
ruby-vpi-18.0.1	samp/counter/xUnit/counter_design.rb
ruby-vpi-18.0.2	samp/counter/RSpec/counter_design.rb
ruby-vpi-18.0.1	samp/counter/RSpec/counter_design.rb
ruby-vpi-19.0.0	examples/counter/xUnit/counter_design.rb
ruby-vpi-18.0.2	samp/counter/xUnit/counter_design.rb