# File lib/ruby-vpi/verilog_parser.rb, line 12
12:   def initialize aInput
13:     input = aInput.dup
14: 
15:     # strip comments
16:       input.gsub! %r{//.*$}, ''
17:       input.gsub! %r{/\*.*?\*/}m, ''
18: 
19:     @modules = input.scan(%r{(module.*?;)(.*?)endmodule}m).map do |matches|
20:       Module.new(*matches)
21:     end
22:   end