| Module | RubyVPI |
| In: |
lib/ruby-vpi.rb
lib/ruby-vpi/rcov.rb lib/ruby-vpi/core.rb lib/ruby-vpi/core/edge.rb lib/ruby-vpi/core/callback.rb lib/ruby-vpi/core/scheduler.rb |
General project information.
| PROJECT_ID | = | 'ruby-vpi' | ||
| PROJECT_NAME | = | 'Ruby-VPI' | ||
| PROJECT_URL | = | "http://#{PROJECT_ID}.rubyforge.org" | ||
| PROJECT_SUMMARY | = | "Ruby interface to IEEE 1364-2005 Verilog VPI" | ||
| PROJECT_DETAIL | = | "#{PROJECT_NAME} is a #{PROJECT_SUMMARY} and a platform for unit testing, rapid prototyping, and systems integration of Verilog modules through Ruby. It lets you create complex Verilog test benches easily and wholly in Ruby." | ||
| Simulator | = | Struct.new(:name, :compiler_args, :linker_args) | ||
| SIMULATORS | = | { :cver => Simulator.new('GPL Cver', '-DPRAGMATIC_CVER', ''), :ivl => Simulator.new('Icarus Verilog', '-DICARUS_VERILOG', ''), :vcs => Simulator.new('Synopsys VCS', '-DSYNOPSYS_VCS', ''), :vsim => Simulator.new('Mentor Modelsim', '-DMENTOR_MODELSIM', ''), :ncsim => Simulator.new('Cadence NC-Sim', '-DCADENCE_NCSIM', ''), } | List of supported Verilog simulators. | |
| SIMULATOR | = | ENV['RUBYVPI_SIMULATOR'].to_sym | ||
| USE_DEBUGGER | = | ENV['DEBUGGER'].to_i == 1 | ||
| USE_COVERAGE | = | ENV['COVERAGE'].to_i == 1 | ||
| USE_PROTOTYPE | = | ENV['PROTOTYPE'].to_i == 1 | ||
| USE_PROFILER | = | ENV['PROFILER'].to_i == 1 | ||
| Edge | = | EdgeClass.instance | ||
| Callback | = | CallbackClass.instance | ||
| Scheduler | = | SchedulerClass.instance |